Электронная книга: Andrew Rushton «VHDL for Logic Synthesis»

VHDL for Logic Synthesis

Making VHDL a simple and easy-to-use hardware description language Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it. This book bridges the gap between the VHDL language and the hardware that results from logic synthesis with clear organisation, progressing from the basics of combinational logic, types, and operators; through special structures such as tristate buses, register banks and memories, to advanced themes such as developing your own packages, writing test benches and using the full range of synthesis types. This third edition has been substantially rewritten to include the new VHDL-2008 features that enable synthesis of fixed-point and floating-point hardware. Extensively updated throughout to reflect modern logic synthesis usage, it also contains a complete case study to demonstrate the updated features. Features to this edition include: a common VHDL subset which will work across a range of different synthesis systems, targeting a very wide range of technologies a design style that results in long design lifetimes, maximum design reuse and easy technology retargeting a new chapter on a large scale design example based on a digital filter from design objective and design process, to testing strategy and test benches a chapter on writing test benches, with everything needed to implement a test-based design strategy extensive coverage of data path design, including integer, fixed-point and floating-point arithmetic, logic circuits, shifters, tristate buses, RAMs, ROMs, state machines, and decoders Focused specifically on logic synthesis, this book is for professional hardware engineers using VHDL for logic synthesis, and digital systems designers new to VHDL but familiar with digital systems. It offers all the knowledge and tools needed to use VHDL for logic synthesis. Organised in themed chapters and with a comprehensive index, this complete reference will also benefit postgraduate students following courses on microelectronics or VLSI/ semiconductors and digital design.

Издательство: "John Wiley&Sons Limited"

ISBN: 9780470977927

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См. также в других словарях:

  • Logic synthesis — is a process by which an abstract form of desired circuit behavior (typically register transfer level (RTL) or behavioral) is turned into a design implementation in terms of logic gates. Common examples of this process include synthesis of HDLs,… …   Wikipedia

  • VHDL — infobox programming language name = VHDL paradigm = behavioural year = 1980s designer = developer = latest release version = latest release date = latest test version = latest test date = typing = strong implementations = dialects = influenced by …   Wikipedia

  • VHDL-AMS — Very High Speed Integrated Circuit Hardware Description Language (auch VHSIC Hardware Description Language), kurz VHDL, ist eine Hardwarebeschreibungssprache, vergleichbar mit einer Programmiersprache, mit der es einfach möglich ist, komplizierte …   Deutsch Wikipedia

  • Logic simulation — is the use of a computer program to simulate the operation of a digital circuit. Logic simulation is the primary tool used for verifying the logical correctness of a hardware design. In many cases logic simulation is the first activity performed… …   Wikipedia

  • High-level synthesis — (HLS), sometimes referred to as C synthesis, electronic system level (ESL) synthesis, algorithmic synthesis, or behavioral synthesis, is an automated design process that interprets an algorithmic description of a desired behavior and creates… …   Wikipedia

  • Ternary logic — A ternary, three valued or trivalent logic (sometimes abbreviated 3VL) is a term to describe any of several multi valued logic systems in which there are three truth values indicating true , false and some third value. This is contrasted with the …   Wikipedia

  • Many-valued logic — In logic, a many valued logic (also multi or multiple valued logic) is a propositional calculus in which there are more than two truth values. Traditionally, in Aristotle s logical calculus, there were only two possible values (i.e., true and… …   Wikipedia

  • Register transfer language — In computer science, register transfer language (RTL) is a term used to describe a kind of intermediate representation (IR) that is very close to assembly language, such as that which is used in a compiler. Academic papers and textbooks also… …   Wikipedia

  • Don't-care — In logic synthesis and logic simulation a don t care or X value is one value in a multi valued logic system that denotes an unknown value, or a value that the designer (for whatever reason) does not care about. In the Verilog hardware description …   Wikipedia

  • Don't-care term — In digital logic, a don t care term is an input sequence (a series of bits) to a function that the designer does not care about, usually because that input would never happen, or because differences in that input would not result in any changes… …   Wikipedia

  • Hardware description language — In electronics, a hardware description language or HDL is any language from a class of computer languages and/or programming languages for formal description of electronic circuits. It can describe the circuit s operation, its design and… …   Wikipedia


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