Книга: Karan Gumber «Implementation of Floating Point Multiplier on Reconfigurable Hardware»
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Производитель: "LAP Lambert Academic Publishing" Foating point operations are hard to implement on reconfigurable devices because of their complexity of their algorithms. On the other hand, many scientific problems require floating point arithmetic with high level of accuracy in their calculations. Therefore VHDL programming for IEEE single precision floating point multiplier module have been explored. Various parameters i. e. combinational delay (Latency), chip area (number of slices used), modeling formats, memory usage etc have been analyzed while implementing the floating point multiplier on reconfigurable hardware. Analyzing the various parameters will provide with the information that Vertex4 will consume less chip Area i. e. 663 with reduced latency i. e. 49. 906 ns as compared with the other FPGAs i. e. Spartan 2, Spartan 2E, Spartan 3, Spartan 3E, Virtex, Virtex 2, Virtex 2P, and Virtex E. Floating point multiplication is a most widely used operation in DSP/Math processors, robots, air traffic controller, digital computers.... ISBN:9783659214523 Издательство: "LAP Lambert Academic Publishing" (2013)
ISBN: 9783659214523 |
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